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Validation Logic · Zero don't-cares, on purpose

BCD Invalid-Code Detector

Every other example involving BCD on this site treats codes 10-15 as don't-cares, since a correctly-functioning system should never produce them. This one is different: its entire job is to catch those exact codes if they ever occur, so every one of the 16 possible 4-bit inputs is meaningful here — there's nothing to mark don't-care.

The problem

A BCD digit should only ever be 0-9. If something upstream misbehaves — a sensor fault, a corrupted register, a bug — codes 10-15 could appear anyway. A detector circuit's job is to flag exactly that: output 1 for the six invalid codes (1010 through 1111), 0 for the ten valid digits (0000 through 1001).

Why this one has no don't-cares

In the 7-segment decoder and BCD-to-Gray-code examples, codes 10-15 were declared impossible and used as free simplification opportunities. Here, the entire point of the circuit is to correctly distinguish those exact codes from valid ones — marking them don't-care would defeat the purpose entirely. Every input from 0000 to 1111 has a specific, required output.

The minimization

With all 16 inputs fully defined and only the six invalid codes required to output 1:

F = AC + AB

Both terms are essential, and both rely on the input's most significant bit (A) being 1 — which makes sense, since every invalid code starts with 1 (10xx through 15xx in binary all begin 1). AC catches four of the six invalid codes, AB catches four (with two-code overlap between them), together covering exactly the required six with no don't-cares needed anywhere.

Input
Karnaugh Map
Minimal Result
Output format
F = 0
Prime Implicant Analysis
Auto-generated Circuit
Universal Gate Conversion

Frequently asked questions

Could this function also be written as just A(B+C)?

Yes — A(B+C) is algebraically identical to AB+AC by the distributive law, and would use one fewer literal written out. The K-map result AC+AB is the standard minimal sum-of-products form; factoring it further is a valid algebraic simplification but is no longer a pure two-level AND-OR SOP circuit.

Would this detector work as a POS expression instead?

Yes — try switching to POS in the tool above. Since only six of sixteen inputs are 1, grouping the ten zeros instead may or may not produce a smaller result; compare both directly rather than assuming.

Why doesn't this need don't-cares if the 7-segment decoder does?

The 7-segment decoder's job is to display valid digits correctly — what happens on invalid codes is irrelevant to that job, so those codes are free to assume either way. This detector's entire job is defined by those same codes, so there's nothing left to leave unspecified.