Static Hazards in Logic Circuits: A K-Map and Consensus-Term Example

A Boolean expression can be correct for every input and still produce a brief, unintended pulse while an input changes. This is a logic hazard: different gate-path delays let internal signals change at different times. A Karnaugh map can help spot a common static hazard, but ordinary minimization does not automatically remove hazards.

This guide works through a static-1 hazard, shows why the redundant consensus term removes it in a two-level SOP network, and explains when to consider the same issue for POS circuits.

What a static hazard means

A static-1 hazard occurs when the output is supposed to stay at 1 during a one-input transition, but a brief delay can make it dip to 0. The Boolean function has the right value before and after the transition; the glitch appears only in the physical implementation as signals pass through gates with unequal propagation delays.

A static-0 hazard is the dual case in a two-level POS implementation: the output should remain 0 but may briefly rise. These terms describe particular transition behavior. They do not mean every circuit glitch is covered by the same fix.

Worked example: F = AB + A′C

Consider the function F(A,B,C) = AB + A′C, which is 1 at minterms 1, 3, 6, and 7: F = Σm(1,3,6,7). The two product terms cover those 1s:

  • A′C covers minterms 1 and 3, where A = 0 and C = 1.
  • AB covers minterms 6 and 7, where A = 1 and B = 1.

Now hold B = 1 and C = 1 while A changes. At A = 0, term A′C is true; at A = 1, term AB is true. The output should remain 1 at both endpoints. But if A′C turns off before AB turns on, both product terms can momentarily be 0, creating a short low pulse.

The K-map view and the consensus term

On a three-variable K-map, minterms 3 (A = 0, B = 1, C = 1) and 7 (A = 1, B = 1, C = 1) are adjacent: only A changes. The minimized groups for A′C and AB cover these cells separately, so no one product term remains true across that transition.

Add the group covering minterms 3 and 7, which gives BC:

F = AB + A′C + BC

By the consensus theorem, BC is logically redundant in AB + A′C: it changes no truth-table output. Physically, it bridges the transition because B and C stay at 1 while A changes, so the BC path keeps the output asserted. The resulting expression is larger than the minimum SOP, but it is a hazard-aware implementation for this transition in a two-level SOP circuit.

In K-map terms, this adds an overlapping group so each adjacent pair of required 1s that must stay high during a single-input change shares at least one implicant. The group is redundant for Boolean equivalence but useful for transition coverage. This is a different goal from minimizing term count and literals; see why overlapping groups are valid and the consensus theorem.

When hazard-free logic matters

Analyze hazards when a brief pulse could be observed or acted on, especially in asynchronous control paths or combinational signals that can affect state without waiting for a clock. A synchronous design may tolerate some combinational glitches if they settle before the receiving register's setup time, but that must be established from the circuit's timing requirements rather than assumed.

  1. Identify transitions where exactly one input changes and the output is required to remain at 1 (for SOP) or 0 (for POS).
  2. Check whether each such adjacent pair of cells is covered together by a common implicant in the implementation.
  3. If a pair has no common term, add an appropriate redundant consensus group and recheck the truth table and timing assumptions.

Limits and next steps

This example addresses a static hazard in a two-level circuit under a single-input change. Multiple inputs changing together, reconvergent paths, multi-level factoring, and dynamic hazards require additional timing analysis. A Boolean minimizer returns an equivalent expression under its minimization objective; it is not a substitute for hazard analysis or circuit timing verification.

Review two-level and multi-level implementations, then compare the redundant term with the minimum-cover method. The combinational vs. sequential logic guide explains where K-maps fit in a larger circuit.

Try the Boolean expression

Enter the example in the solver to inspect its minimized Boolean form, then compare it with the hazard-aware expression above.

Open the Boolean Expression Simplifier