A minimized product-of-sums expression can be logically correct and still produce a brief glitch in a real circuit. When the output should remain at 0 during a single input change but momentarily rises to 1, the circuit has a static-0 hazard. In a POS implementation, the K-map way to detect this risk is to inspect adjacent zero cells: every relevant adjacent pair should be covered by at least one common zero-group, which becomes one sum factor.
This worked example shows a function whose zero cells are correctly grouped into two pairs, yet one transition is not protected by a shared factor. We derive the POS expression, trace the possible glitch through the gates, add a redundant maxterm, and verify that the added factor does not change the truth table. The distinction between Boolean minimization and hazard-free implementation is central: the extra term is redundant for logic value, but useful for transition behavior.
What a static-0 hazard means
Suppose a combinational function is 0 both before and after one input changes. The ideal truth table says the output should remain low. In the physical circuit, however, the changing signal may reach different gates along paths with unequal propagation delays. If one product path briefly releases the output before another path has settled, the output can pulse high. Since the intended value was static at 0, this is called a static-0 hazard.
For a POS network, the output is an AND of sum terms. A zero output occurs whenever any one sum factor is 0. To maintain a zero during a transition, it is helpful for one factor to remain zero across both adjacent input assignments. If one zero is produced by one factor and the neighboring zero by a different factor, unequal delays can briefly make both factors 1, allowing the AND output to rise. Grouping adjacent zeros in a map identifies the factor that remains zero across both assignments.
Hazard analysis is about physical transitions, not just static truth-table correctness. It assumes a particular model, commonly single-input changes and positive gate delays. If several inputs switch at once, or if a design uses a different cell or timing model, other behavior may matter. The K-map criterion is a practical structural check for the standard two-level POS case; a timing simulation or formal hazard analysis may be needed for a complete implementation guarantee.
A POS example
Consider the function of three inputs defined by F(A,B,C) = (A+B)(A′+C). A sum factor is zero only when every literal in it is zero. The factor A+B is zero when A=0 and B=0, regardless of C, so it creates zeros at minterms 0 and 1. The factor A′+C is zero when A′=0 and C=0, which means A=1,C=0, regardless of B; it creates zeros at minterms 4 and 6.
| Minterm | ABC | Why F is 0 |
|---|---|---|
| 0 | 000 | A+B = 0 |
| 1 | 001 | A+B = 0 |
| 4 | 100 | A′+C = 0 |
| 6 | 110 | A′+C = 0 |
All other assignments produce 1. On a three-variable K-map, zero cells {0,1} form one pair, and {4,6} form another pair. Each pair is a maximal zero-group. In a POS derivation, a zero-group becomes a sum term: variables fixed at 0 appear uncomplemented, while variables fixed at 1 appear complemented. Thus {0,1}, where A=0 and B=0, gives A+B. Pair {4,6} has A=1 and C=0, so it gives A′+C. Their product is exactly the starting expression.
Group zeros and derive factors
The two groups are valid because each contains a power-of-two number of adjacent zeros, and neither includes a 1-cell. In the first pair, C changes from 0 to 1, so C disappears from the factor; only A=0 and B=0 remain fixed. In the second pair, B changes, so the factor ignores B and retains A=1 and C=0. Thinking in terms of fixed bits prevents a common error: for POS, the literal polarity is opposite the SOP grouping rule.
The expression is minimum in the usual product-of-sums sense. Each of the two groups covers two zeros, and no four-zero rectangle can cover all four zeros without including one of the specified 1s. The two sum factors are therefore a concise representation. But minimization only asks for the right output value at each stable input. It does not ask whether every transition between those values is protected against gate-delay differences.
Now look at zero cells 0=000 and 4=100. They differ only in A, so they are adjacent in the K-map. Cell 0 is covered by the factor A+B; cell 4 is covered by A′+C. No one factor is zero at both cells. That adjacency is the uncovered transition to examine. By contrast, 0 and 1 share A+B, and 4 and 6 share A′+C, so those pairs are protected by a common factor in this two-level model.
Find the uncovered transition
Hold B=0 and C=0 while A changes from 0 to 1. At A=0, the first factor A+B is 0, so F is 0. At A=1, the second factor A′+C is 0, so F remains 0. During the transition, imagine A has reached the second factor through the complemented path, while the direct A path has already changed in the first factor. If the first factor becomes 1 before the second factor becomes 0, both sum terms are briefly 1 and the output product can rise.
The exact pulse depends on propagation delays and implementation. In a gate-level drawing, the changing input A fans out to A and A′, and those paths do not switch at precisely the same instant. Even if an ideal simulator with zero delays shows a constant 0, a delayed simulation can show a pulse. Conversely, one selected standard-cell implementation may suppress the pulse because its delays happen to line up; relying on that accident is not a robust logic-level design guarantee.
The K-map rule gives an easy inspection: list every pair of adjacent zero cells that can represent a single-input transition. Confirm that the pair lies inside one zero-group. If a pair is only covered by separate groups, the POS network may have a static-0 hazard on that transition. The same basic idea applies to SOP static-1 hazards, where adjacent 1-cells need a shared product term. The companion guide on static-1 hazards and consensus terms treats the SOP case.
Add a bridging maxterm
To cover adjacent zero cells 0 and 4 together, group {0,4}. These rows are 000 and 100, so only A changes; B=0 and C=0 stay fixed. The corresponding sum factor is B+C. It is zero at both rows. Add it to the product:
The new factor bridges the transition. While B=C=0, B+C stays at 0 for either value of A, so the output remains forced low even if the A and A′ paths switch at different times. The factor is redundant in the Boolean sense because whenever B+C=0, the original function is already 0. It therefore cannot turn any original 0 into a 1 or remove an original 1.
This factor is an instance of the consensus theorem in POS form. For factors (A+B) and (A′+C), the consensus sum B+C may be added without changing the function. You can also verify redundancy directly: if B+C=0, then B=0 and C=0. If A=0, A+B=0; if A=1, A′+C=0. Thus the original product is zero in all cases where the added factor is zero. Multiplying by the extra factor leaves F unchanged.
Verify the redundant term
Check the truth table after adding B+C. At minterm 0, B+C=0 and the output remains 0. At minterm 4, B+C=0 and the output remains 0. At minterms 1 and 6, the original output was already 0, so adding another factor cannot make it 1. At every original 1-cell, B+C must be 1; otherwise the previous argument would imply the original function was 0. Therefore all original 1s remain 1.
For algebraic verification, let X=(A+B)(A′+C). We need show X(B+C)=X. Expand the first two factors: X=AA′+AC+BA′+BC=AC+A′B+BC. By the consensus theorem, AC+A′B+BC simplifies to AC+A′B. Thus the added BC product in the complement-side derivation is redundant. The POS expression with (B+C) is equivalent to the original. If algebraic transformations feel error-prone, evaluate all eight rows; three variables are small enough for exhaustive checking.
Be precise about the purpose of the extra term. The minimized POS has two factors; the hazard-aware expression has three. If a question asks for the minimum POS, present the two-factor answer and then label the redundant term separately as a hazard fix. If the specification requires hazard-free operation, the third factor is part of the implementation. Do not call it a new minterm or a correction to the truth table; it is redundant logic added to bridge a transition.
Implementation limits
The adjacent-zero criterion is standard for a two-level POS network under single-input changes. A network with additional logic levels, shared subexpressions, asynchronous feedback, or multiple changing inputs can exhibit behavior that a simple two-level map inspection does not capture. A gate library may also contain cells whose internal structures affect pulse propagation. For safety-critical controls, hazard analysis should be tied to the actual circuit and timing assumptions, not only to a hand-drawn map.
Don't-cares require care. An input assignment declared unreachable or irrelevant may be treated as a don't-care during minimization, but if the system can enter it transiently, it may participate in a hazard or produce an unsafe output. Likewise, asynchronous inputs can change near one another even if a synchronous functional model assumes one transition at a time. The validity of every don't-care assumption should come from the system specification or verified reachability argument.
Static hazards are often handled by adding consensus terms. Dynamic hazards—multiple output transitions while the ideal output changes once—need broader timing analysis and are not generally repaired by adding one consensus factor. See static and dynamic hazards for the distinction. For a university laboratory treatment of static-0 hazard behavior in POS circuits, review the UMBC hazards lab.
A hazard-checking procedure
- Minimize the function normally. Group zeros to get a POS candidate and record every zero assignment.
- List adjacent zero pairs. Two assignments are adjacent when exactly one input bit changes.
- Check shared factors. Each critical pair should be contained in at least one common zero-group.
- Identify uncovered pairs. These are candidate static-0 hazard transitions in a two-level POS implementation.
- Add a bridging zero-group. Derive the corresponding sum term and label it redundant.
- Verify both logic and timing assumptions. Check truth-table equivalence and use a suitable delay model for the implementation.
For the example, the uncovered pair is {0,4}, and the bridging factor is B+C. The original function and the hazard-aware function have identical stable outputs; the latter also gives one factor that remains zero across the A transition at B=C=0. That is the core idea: use adjacent map geometry to find a structural path that stays active while other paths settle.
A K-map can therefore answer two different questions. The first is “What is a small expression for this Boolean function?” The second is “Do the selected implicants preserve the output through the transitions the system cares about?” The first favors fewer groups. The second may require a redundant group. Keeping those objectives separate leads to clearer algebra and safer circuit reasoning.